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Intellectual Property
Implementation
We have multiple Dewdrop-RISCV64 simulators/implementations:
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nrm: our own software simulator;
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dewdrop-spike: Dewdrop integrated into the official Berkeley spike "RISCV golden model" simulator;
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a representation which compiles to FIRRTL, which compiles to SystemVerilog using the CIRCT FIRRTL toolchain, which compiles to C++ using Verilator;
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the same SystemVerilog which compiles to a bitstream for the Amazon AWS F2 FPGA using Vivado; this single-cycle CPU runs at 15.625 MHz on the F2; we expect the performance to improve.
We provide a user augmented RISCV compiler toolchain which targets Dewdrop-RISCV64:
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we use the gcc-riscv compiler unmodified,
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however we interleave the build process with some additional stages.
We provide runtime support libraries: we link against
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our own dewdrop-runtime library, and
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a modified dewdrop-musl libc.
Relevance of open source licenses of code that we modify:
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Note that all of the open source projects we maintain as a modification (clang/LLVM, spike, pk, musl) are BSD-style Open Source,
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though there might be some question as to the legal status of something we maintain as a patch to the default gcc-riscv linker script since gcc is now released under GPLv3: it is not clear to me whether a patch to a linker script which can be applied at each run counts as a modification of gcc; note that this patch only augments the linker script, in order to also merge our meta-data, when doing the merge phase of linking.
Patents
Dewdrop issued patents and published applications (with more pending applications that have not been published):
“Hard Object: Hardware Protection for Software Objects,” Daniel S. Wilkerson and John Kubiatowicz, described in an application for Letters Patent of the United States filed on March 10, 2008, issued on 2013 January 29, US Patent US8364910B2;
“Hard Object: Constraining Control Flow and Providing Lightweight Kernel Crossings,” Daniel S. Wilkerson and Mark Winterrowd, described in an application for Letters Patent of the United States filed on March 14, 2013, issued on 2018 March 14, Application Serial No. 13/804,633, US Patent US9934166B2;
“Hard Object: Lightweight Hardware Enforcement of Encapsulation, Unforgeability, and Transactionality,” Daniel S. Wilkerson and Mark Winterrowd, described in an application for Letters Patent of the United States filed on March 11, 2014, issued on 2017 February 14, US Patent US9569612B2;
“Hard Object: Lightweight Hardware Enforcement of Encapsulation, Unforgeability, and Transactionality,” Daniel S. Wilkerson and Mark Winterrowd, described in an application for Letters Patent of the United States filed on January 12, 2017, issued on 2018 April 3, US Patent US9935975B2;
"Hardware Enforcement of Boundaries on the Control, Space, Time, Modularity, Reference, Initialization, and Mutability Aspects of Software" Daniel S. Wilkerson, described in an application for Letters Patent of the United States filed on August 30, 2021, issued on 2025 July 29, US Patent US12373213B2;
“Hardware Enforcement of Boundaries on the Control, Space, Time, Modularity, Reference, Initialization, and Mutability Aspects of Software.” Daniel Shawcross Wilkerson, Mark William Winterrowd, Robert N. Mayo, Scott Gordon McPeak, Japanese Patent Office application 2021-563210, filed 2021 October 21, registration number JP,7786844,B;
“Hardware Enforcement of Boundaries on the Control, Space, Time, Modularity, Reference, Initialization, and Mutability Aspects of Software.” Mark William Winterrowd, Daniel Shawcross Wilkerson, Robert N. Mayo, Scott Gordon McPeak, Unitary Patent EP3959613, registered October 5, 2026, European Patent Office application 20794519.7, filed 2021 November 22, EP3959613A1;
Patent applications
“Hardware Enforcement of Boundaries on the Control, Space, Time, Modularity, Reference, Initialization, and Mutability Aspects of Software, with a Variable-Width Time Field on Absolute Pointers.” Daniel Shawcross Wilkerson, U.S. utility application 19/285,249, filed 2025 July 30, US20260037616A1;